The Well Synchronized Asynchronous FIFO buffer – I2S/DSD over USB interface

XMOS USB receiver

The TWSAFB-XMOS is an asynchronous I2S/DSD over USB interface intended to isolate the DAC
from the source, getting them operating in different and fully isolated time domains. This way the
jitter of the source cannot affect the DAC. Practically the incoming I2S/DSD data are processed by
an XMOS processor which works in slave mode. This means that the outgoing data are
synchronized and reclocked in a different time domain managed by the master clock and optically
isolated from the incoming data, preventing source jitter from crossing the receiver and affecting
the DAC. In practice, this allows the output signals to be regenerated starting from a much more
precise clock than that of the source.


Input format: I2S/DoP/DSD

Inputs: USB port
Output format: PCM up to 192 kHz, DSD up to DSD256
Output phase: direct or reversed (dip-switches on board)
DSD RTZ: selectable by dip-switch on board
Optical isolation: all output signals are optically isolated from the XMOS processor to avoid interferences from the source
Optional: PCM2DSD interface connectors on board
Master Clock selection: T-switch configuration relay to select the sample rate family instead of multiplexers
External Master Clock: SMA connectors can be installed for external clocks
Direct clock output: MCK/SCK directly from the Master clock
Phase noise: very low phase noise outputs (MCK, LRCK, BCK)
Master clock output: 22.5792/24.576 MHz
Power supply: 3V3DC/120 mA (isolated side with Accusilicon clocks installed)
External power supply: optional 5VDC/300 mA (USB side)
Software: ASIO driver for Windows provided
Board size: 134 x 109 mm (excluding USB and SMA connectors)