AD5791 dual mono sign magnitude architecture digital to analog converter
The TWSDAC-AD5791 is 20 bit 384kHz dual mono sign magnitude architecture DAC.
Inputs: 24 bit custom protocol (provided by the TWSAFB-LT FIFO buffer)
Format: up to 20 bit 384kHz
Architecture: AD5791 R2R ladder with sign magnitude architecture
Clock mode: stopped clock
Master clock: 5.6448/6.144 MHz up to 176.4/192KHz, 11.2896/12.288 MHz up to 352.8/384 KHz
Isolation: Full optical isolation
Output: voltage output 2V rms, DC coupled
Power supply: +/- 12VDC 30 mA, +3.3VDC 40mA
Board size: 97 x 99 mm
Get the best performance
The TWSAFB-LT FIFO buffer provides the custom protocol to feed the AD5791 DAC in dual mono/sign magnitude architecture. This architecture avoids the DAC to switch the MSB every zero crossing in order to decrease the glitch.
Two DAC chip are needed for each channel.