The Well Segmented discrete DSD Digital to Analog Converter

DSD discrete DAC

The TWSDAC-DSD is a DSD discrete DAC which accepts up to DSD512 sample rate.


Inputs: balanced DSD (provided by the TWSAFB-LT FIFO buffer)
Format: up to DSD512
Architecture: balanced
Clock mode: continuous clock
Master clock: 5.6448/6.144 MHz up to DSD128, 11.2896/12.288 MHz up to DSD256, 22.5792/24.576 MHz up to DSD512
Isolation: DATA signals optically isolated
RTZ  logic: Return to Zero logic available when driven by the TWSAFB-LT
Output: voltage output 2.3V to 3.5V rms
Power supply: digital VDD +3.3VDC to +5VDC 300 mA, analog Vref +3.3VDC to +5VDC 150 mA
Board size: 163 x 140 mm