Strengths and shortcomings of a FIFO and Phase noise measurements

[gentlevoiceParticipant]

Hi all,

This topic – i.e. discussing strengths and (possible) shortcomings of phase noise measurements was initiated in the diyaudio forums, however, one of the other diyaudio members suggested posting the relevant posts here in the TWA forums so as to maybe get a comment from Andrea – which we reckon may have given this some thought. Below I have inserted the three relevant posts from diyaudio in sequence:  … Please feel welcome to comment, anyone!

———————————

Post #437 from The Well synchronized asynchronous FIFO ** thread:

———————————

Sources have always had major impact to me aswell, always.

When I get I my hands on the DAC lite+FIFO one of the most important tests will be:
PC > XMOS USB to toslink > toslink to i2s > FIFo lite
vs
SD player > FIFO lite

 

Andrea thinks his FIFO should be practically* independent from source (*if FIFO lite was perfect there would be no need for the more elaborate ‘top’ version of FIFO he mentioned is in the works).
I was sceptical, still am, but he strengthened his case a whole lot after demonstrating, with PN measurements, some of the issues with Ian’s FIFOs, which would help to explain why people were reporting they could still hear influence from the source with them.
Ian revised his FIFOs and offered some add-ons after that, but without new PN measurements there is no reason to believe any of those original issues were even resolved.

 

At the same time there is no reason believe source influence can be entirely correlated to PN measurements.
PN gives us an even better insight into what’s actually going on but I have to think that they are still another form ‘steady state’ or average-over-time measurement and might not catch some very complex, real time effects and behaviours when jittery signal enters the FIFO, jitter that is likely to be constantly morphing and changing depending on activity in the pc, noise on supply and so on.

 

SD card is an absolute PITA to use in all aspects, if FIFO lite can eliminate the majority of source influence using PC the rest can be forgiven.
I imagine seperating source with a long toslink cable should help make FIFOs job somewhat easier.

——————————–

Post #438

——————————–

I have suspected even with optical isolation, and galvanically isolated mains (no earthing), that disturbances on mains AC caused by the PC could still make it way through the power transformers in FIFO/DAC and influence it on some level, laptop on battery would obviously address that.
You still have unrelated mains disturbances and for consistent peak performance in FIFO/DAC you probably need batteries there aswell.

I have always noticed major changes in how all systems sound depending on time, day etc.
always hard to tell how much of if it psychological and real but the difference can be pretty extreme sometimes and there is a clear pattern of better sound at very late or very early hours, times when you’d expect activity on national grid to be lowest.
With enough care and filtering in mains supply I would hope the effect could be made insignificant enough not to have deal with hassle of batteries

——————————–

Post #439

——————————–

@lasercut: Hi   … interesting comments & thoughts you share.

As it is I have actually been wondering why an FIFO would/should have such a positive effect … While I recognise that an FIFO may shift the incoming data stream to another point in time on the output (like e.g. in the TWTMC FIFO, as I understand it) as I see it this may mainly cause the input data to be time-wise uncorrelated with the output data.

However, if there somehow is an “electrical influence/coupling” between the input & the output of the FIFO (or the FIFO for some reason adds its own processing noise structure) then one may – due to this time shift – have a point(s) in time where the input data are noisy (e.g. many data level transitions) and the output data experience less data transitions. I reckon this could be unfeasible due to PCB GND disturbances, increased PSU noise etc. …

On the other hand if there is not an “electrical influence/coupling” between the input & output of the FIFO (or the FIFO for some reason does not add its own processing noise structure) then increasing or decreasing the time distance between the incoming data (the FIFO “buffer”) should not cause any SQ difference. I.e. the different buffer lengths in e.g. the TWTMC FIFO should not lead to different SQ impressions …

Which leads me to my point which is that if the electrical isolation between the incoming clock & data (from the PC/data player) really is efficient (e.g. well-designed optical isolation and re-clocking) then I cannot see that the FIFO would necessarily add isolation ..? It may change the structure of the “input data to output data” electrical coupling but since an FIFO necessarily also in practice contains ICs with a small size (i.e. crosstalk, PCB trace currents influencing eachother, and IC inter-pin crosstalk) then such ICs may also couple signal from input to output – as other ICs do.

With this in mind: My guess would be that what really may matter is to isolate the data input from the data output, phase noise & other noise-wise, – using ICs and PSU structures that make this happen. And in this context an FIFO would be equally vulnerable to such a design not being executed “feasibly” – as is a more “common” isolation and re-clocking design.

PN gives us an even better insight into what’s actually going on but I have to think that they are still another form ‘steady state’ or average-over-time measurement and might not catch some very complex, real time effects and behaviours when jittery signal enters the FIFO, jitter that is likely to be constantly morphing and changing depending on activity in the pc, noise on supply and so on.

I have had these thoughts as well, yet have not remembered them when communicating with Andrea. Would be interesting to have some light shed on this …

Cheers,

Jesper

——————————

Now, it would be interesting to get more insight into the intricacies of phase noise measurement – & maybe also its shortcomings, so again, please feel welcome to comment.

Cheers,

Jesper

[The Well AudioParticipant]

I2S input and output data from the FIFO Lite are optically isolated.
Moreover source (I2S input) and DAC (FIFO output) operate in different time domains.
There aren’t any path between the two time domains (ground and VCC).

I2S input is processed by the FPGA in the “dirty” time domain, while LRCK output comes directly from the master clock (by dividers), the “clean” time domain.
While the BCK coming from the FPGA is very jittery, the LRCK coming from the master clock is very clean, its close in phase noise is much better than the one of the Master clock.
Some PN measurements will be published soon.

This provides a good way to drive all the DACs which switch on the LRCK or MCK signal, like TDA1541A, AD1862, SABRE, TWSDAC-LT and also TWSDAC-DSD as soon as it’s ready.
All our DACs available on the website provide full optical isolation from the FPGA FIFO side.
We have designed the TWSAFB-OI to provide optical isolation even for other DACs which don’t provide such isolation.

For the DACs which switch on the BCK (like the PCM1704, PCM1794 and so on), we have designed the TWSAFB-OIR.
It isolates (optically) all the signals coming from the FPGA and performs the reclocking of them by the clean Master clock.

Thre is a simple reason to design the “top version” of the FIFO.
In all the above boards the optical isolation is performed in the same PCB layout. Although there aren’t common paths between the “dirty” and the “clean” sides of the board, the isolation is not perfect.
That’s the reason to design totally separated boards linked by optic fiber.
This way we implement a brick wall between the two time domains. Nothing can pass through the optic fiber.
So that the dirty FPGA part of the FIFO cannot affects the DAC in any way.
Of course, this way is much more complex and expensive than the FIFO Lite, and it will need 3-4 chassis.

Then, about the main AC, battery supply systems are another brick wall against the PSU noise.

Finally, we well know that PN is steady state measurement, but we believe that timing errors heavy affect digital to analog conversion.

Of course, anyone can judge the result by his own ears.
We have no other way to measure the results, fancy tools like the AP are pretty useless in our opinion.

 

[OlivierParticipant]

Gentlevoice,now There is a dialogue,

Thank you for these details Andréa,You are already testing the new FIFO?

[Olivier]

Olivier Said

Gentlevoice,now There is a dialogue,

Thank you for these details Andréa,You are already testing the new FIFO?

Not yet, the top versions of the FIFO/DAC are under developing.
It will take at least one year.

[lasercutParticipant]

Do you have an predicition on price range for them?

Will top DAC be compatiable with FIFO lite, or vice versa?

Now starting to wonder if it’s better idea to wait and invest in top versions

[The Well AudioParticipant]

Since the top version of FIFO/DAC are under developing we have no idea about the final prices.
We can estimate 4-5 times the prices of the FIFO/DAC Lite.

Top versions are not compatible with the Lite versions.
Moreover the top version of the FIFO is not versatile like the FIFO Lite. It will drive the top DAC only.

The top version of FIFO/DAC is a closed system.

[OlivierParticipant]

It’s going to be a great system, thank you for this information Andrea

[lasercutParticipant]

cool, thanks

[gentlevoiceParticipant]

Hi all …

& thanks Andrea for your reply. However, in relation to the PN measurement and your comment:

Finally, we well know that PN is steady state measurement, but we believe that timing errors heavy affect digital to analog conversion.

… one of the things I (and as I read it, lasercut) were wondering about is if the PN measurements also use some kind of averaging of measurement points – thus somehow allowing for “timing instability” to appear in practice – even if the PN measurement looks fine? I am thinking that it could be similar to FFT measurements where many measurements often are averaged in a given FFT spectrum … but in doing so it likely does not show the variations that may be between the averaged results (may of cause be analyzed statistically but this again may not show the individual measurement’s variations).

Do you know about this?

Cheers,

Jesper

[gentlevoice]

gentlevoice Said

if the PN measurements also use some kind of averaging of measurement points – thus somehow allowing for “timing instability” to appear in practice – even if the PN measurement looks fine?

We don’t believe, BTW the topic is enough complex, so it’s a little difficult to explain the working principle of the Timepod and other PN measurements tool operating in the same manner.

Just a quick explanation from a downloadable paper
http://www.wriley.com/Clock%20Measurements%20Using%20the%20TimePod%205330A%20with%20TimeLab%20and%20Stable32.pdf

“… high-speed, high-resolution analog-to-digital conversion (ADC) devices that sample the RF
reference and signal inputs, fast in-phase and quadrature digital down conversion, low pass filtration,
decimation and other digital signal processing, including the arctangent calculation of phase and FFT spectral
analysis, along with dual-channel cross-correlation to cancel internal noise.”

Good papers about phase noise measurement can be found at rubiola.org

[gentlevoiceParticipant]

Thanks, Andrea. I will take a look at it – will be feasible to get a better understanding of the PN measurements procedure.

Cheers,

Jesper

[Author]

Posts