Reply To: The Well synchronized asynchronous FIFO buffer – Slaved I2S reclocker

Forum Digital line The Well synchronized asynchronous FIFO buffer – Slaved I2S reclocker Reply To: The Well synchronized asynchronous FIFO buffer – Slaved I2S reclocker

#1759
multiblitz
Participant

I tried to connect the sdtrans384 to the fifo…wave mode…no music…(yes, it shows it is playing the files with resolution etc)…are there different i2s dialects ?

 

sdtrans speaks I2S*2 LRCK (fs), MCLK (22.5792 or 24.576 MHz), DCLK (64 fs), SDAT +3.3V CMOS level output…?

 

I remember there was something about right-justified data or left-justified data (in theory)…but sofar have no experience with that, never came across that bridge before…if i got it right, sdtrans384 output Left justified…with the “LSB extension algorithm”…what ever this means…does the Fifo understand that dialect ? Any settings to be changed for that input ?