› Forum › Digital line › The Well synchronized asynchronous FIFO buffer – Slaved I2S reclocker › Reply To: The Well synchronized asynchronous FIFO buffer – Slaved I2S reclocker
27/01/2023 at 10:47
#2059
Participant
Hi, when I connect signal via I2S from Asynchronous FIFO buffer to Transmitter I2S over HDMI, Which signal should I connect between two board ( MCLK, BCK, LRCK, DATA, ground ?).
Tks. alot for your help
Phuong