jmmbarco
I do not see how this is possible. I am sure I am not explaining myself correctly…
What I am in fact doing in this test is:
1. I am pulling out the TDA from its socket and installing a smalll permaproto (lower one) with a double row pin header into all 28 pins.
2. Above this permaproto I install a second identical permaproto (upper one), just 5mm above. All pins are connected between the two permaprotos excepting PINs 1, 2 and 3.
3. I install the TDA on the upper proto in the same position as in the socket.
3. PINS 1,2 and 3 of the lower proto (XH connector) are connected to the input of the FIFO, carrying the signals coming from the CS8414.
4. PINS 1,2, and 3 of the upper proto(XH connector) are connected to the output of the FIFO, carrying the signals “reclocked” into the TDA.
What I am asking, if possible, is how and where to connect GND in this scenario.
Maybe using an I2S isolator between the lower proto and the FIFO input?
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This reply was modified 11 months, 4 weeks ago by
jmmbarco.